Design of Arithmetic Circuits Using Resonant Tunneling Diodes and Threshold Logic

This paper describes the design of arithmetic circuits based on hybrid integrated resonant tunneling diodes and heterostructure eld-e ect transistors. The key components are depth-2 parallel counters consisting of multiple terminal threshold gates. In particular, we propose a novel parallel addition scheme by combining threshold logic and systolic VLSI-algorithms for bit-level computations. The approach is motivated by the demand for locally interconnected circuit modules to solve the wiring problem in nanoelectronic circuits.